Cypress Semiconductor /psoc63 /CTBM0 /CTD_SW

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Interpret as CTD_SW

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CTDD_CRD)CTDD_CRD 0 (CTDS_CRS)CTDS_CRS 0 (CTDS_COR)CTDS_COR 0 (CTDO_C6H)CTDO_C6H 0 (CTDO_COS)CTDO_COS 0 (CTDH_COB)CTDH_COB 0 (CTDH_CHD)CTDH_CHD 0 (CTDH_CA0)CTDH_CA0 0 (CTDH_CIS)CTDH_CIS 0 (CTDH_ILR)CTDH_ILR

Description

CTDAC connection switch control

Fields

CTDD_CRD

CTDAC Reference opamp output to ctdrefdrive

CTDS_CRS

ctdrefsense to opamp input

CTDS_COR

ctdvout to opamp input

CTDO_C6H

P6 pin to Hold capacitor

CTDO_COS

ctdvout to Hold capacitor (Sample switch). Note this switch will temporarily be opened for deglitching if CTDAC.DEGLITCH_COS is set

CTDH_COB

Drive the CTDAC output with CTBM 1x output during hold mode in Sample and Hold operation

CTDH_CHD

Hold capacitor connect

CTDH_CA0

Hold capacitor to opamp input

CTDH_CIS

Hold capacitor isolation (from all the other switches)

CTDH_ILR

Hold capacitor leakage reduction (drive other side of CIS to capacitor voltage)

Links

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